IEC 61131-3 Memory Offset Mapper

Lay out PLC variable offsets with vendor-specific alignment rules and export tag data.

AEO summary

A PLC memory mapper lays out variable offsets according to vendor-specific alignment rules so you can build a cleaner tag map.

Use this page when you need a fast answer for where PLC variables are likely to land in memory across Siemens, Rockwell, Mitsubishi, and other common alignment styles. It helps you move from a list of tags to a structured offset table faster.

  • Useful for PLC memory planning, HMI tag preparation, and documentation.
  • Shows address offsets and size consumed for each variable.
  • Helps reveal padding and alignment effects before implementation.

Architecture & Controls

Target PLC Manufacturer (Top 10 Global)
Auto-calculates corresponding architecture alignment (Siemens, Rockwell, Word16, or IEC).
No saved layout in this browser yet.

Generated Memory Map

Memory map is empty. Add variables from the control panel.

How to read the result: each row shows the variable name, data type, calculated address offset, and the amount of memory consumed after the selected vendor alignment rules are applied.

Use the generated map as a planning and documentation aid, then verify final addresses against the real PLC compiler, data block format, and project conventions.

IEC 61131-3 Memory Architecture

The IEC 61131-3 standard defines the programming languages and data models for programmable logic controllers. Memory mapping involves calculating exact byte offsets for variables in contiguous data blocks, respecting alignment rules specific to each PLC manufacturer.

Manufacturer-Specific Architectures

Different PLC manufacturers implement distinct memory alignment rules: Siemens uses 2-byte alignment for S7-1500, Rockwell uses 4-byte alignment, Mitsubishi uses 16-bit D-Register mapping, and the IEC standard defines its own generic alignment scheme.

Related Tools